1. Field of the Invention
The invention relates to video terminal display control systems, and more particularly to a logic control circuit wherein dual CRT control unit chips may be used in combination to provide a substantially increased number of visual attributes per display row with minimal effect on data transfer rates.
2. Prior Art
Programmable CRT control unit semiconductor chips have been used in video display terminals to autonomously issue data request signals in regular time intervals. In response thereto, video display character and visual display attribute bytes are stored into the CRT controller unit, and thereafter provided to a CRT control system for display on a CRT screen at a system clock rate. The CRT control unit chips generally have supported 25 line CRT displays.
With the increased reliance upon video display terminal systems in the day-to-day operation of commercial enterprises, an increased demand for greater flexibility in the number of display attributes that may be applied to a display character has occurred. Such display attributes include a character underline, character blinking, character blank, inverse video contrast, alternate character selection, and lowered character intensity.
The ability to increase the number of visual attributes that may be provided in a display row of information characters has been limited by the storage capacity of the CRT control unit chips. A need has arisen for an application of available CRT control unit chips wherein additional visual attributes may be provided in a display row with minimal effect on data character transfer rates, and without substantially increasing the complexity of the video display control circuitry.